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1.3A USRP Software Defined Radio Peripheral MIMO Configuration

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1.3A USRP Software Defined Radio Peripheral MIMO Configuration

Brand Name : Luowave

Model Number : N210

Place of Origin : China

MOQ : 1 Piece

Price : USD

Payment Terms : T/T

Delivery Time : Spot Goods or 30 Days

Packaging Details : Paper Box\Paper Carton

Supply Ability : 1 Piece

Number of channels: : 1 transmit, 1 receive

Frequency Range: : 0-6000Hz

Bandwidth : up to 20MHZ

Feature : Onboard FPGA processing

FPGA : Xilinx Spartan 3A-DSP 3400 FPGA

ADC : 14 bits- 100 MS/s

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Product Overview

The USRP-LW N210 provides high-dynamic range, high-bandwidth and processing capability. The architecture includes a Xilinx Spartan 3A-DSP 3400 FPGA, 100 MS/s dual ADC, 400 MS/s dual DAC and Gigabit Ethernet connectivity to stream data to and from host processors.

Main Features:

1. Maximum transmission rate:50MS/s

2. Gigabit Ethernet connection

3. MIMO cable connection—based on only one single transceiver link per USRP-LW N210, so MIMO construction must be built by two or more USRP-LW N210s

4. Onboard FPGA processing

5.FPGA:Xilinx Spartan XC3SD3400A

6. ADCs: 14 bits- 100 MS/s

7. DACs: 16 bits - 400 MS/s

8. Ability to lock an external 5 or 10 MHz reference clock

9. Optional internal GPS servo clock – USRP-LW N210 GPSDO

Schematic diagram

1.3A USRP Software Defined Radio Peripheral MIMO Configuration

Detailed performance:

A modular design allows the USRP-LW N210 to operate from DC to 6 GHz, while an expansion port allows multiple USRP-LW N210 series devices to be synchronized and used in a MIMO configuration. An optional GPSDO module can also be used to discipline the USRP-LW N210 reference clock to within 0.01 ppm of the worldwide GPS standard. The USRP-LW N210 can stream up to 50 MS/s to and from host applications. Users can implement custom functions in the FPGA fabric, or in the on-board 32-bit RISC softcore. The USRP-LW N210 provides a larger FPGA than the USRP-LW N200 for applications demanding additional logic, memory and DSP resources. The FPGA also offers the potential to process up to 100 MS/s in both the transmit and receive directions. The FPGA firmware can be reloaded through the Gigabit Ethernet interface.

Technical Parameters:

Parameter category numeric value unit Parameter category numeric value unit
Input/Output RF performance parameters when paired with WBX-LW
DC voltage input 6 V Single-sideband signal/image rejection 35/50 dBc
current 1.3 A Phase noise (1.8GHz).
Current when installing the WBX daughter board 2.3 A 10kHz -80 dBc/Hz
Convert module parameters 100 kHz -100 dBc/Hz
ADC sampling rate 100 MS/s 1MHz -137 dBc/Hz
ADC resolution 14 bits Output power 15 dBm
ADC SFDR 88 dBc Enter a third-order intercept point 0 dBm
DAC sampling rate 400 MS/s Noise figure 5 dB
DAC resolution 16 bits Physical properties
DAC SFDR 80 dBc Operating temperature 0-55 C
With host maximum rate (8b/16b). 50/25 MS/s size 225×165×50 mm
Local vibration accuracy 2.5 ppm weight 1.0 kg
Lock GPSDO precision 0.01 ppm

Included in This Equipment:

1. USRP-LW N210

2. 2 SMA-Bulkhead Cables

3. 1 Gigabit Ethernet Cable

Please do not hesitate to contact me if you need any further information.

Whatsapp/skype/Wechat: +8618062514745 Web:https://www.luowave.com/en/


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